At present, with the development of liquid crystal display techniques, the competition in the liquid crystal panel industry becomes fiercer and fiercer, and a preferred scheme of the panel vendors is to reduce the production cost of the liquid crystal display panel in order to enhance competitiveness. In order to reduce the production cost of the display panel, disposing the gate driving circuit at edge of the display panel is known by the skilled person in the art. The gate driving circuit comprises multiple shift registers and each of the shift register corresponds to one gate line. The multiple shift registers are arranged in series, and there is a trigger signal transferred stage by stage between two adjacent shift registers. Each shift register, after receiving a trigger signal, outputs a gate line scanning signal to a corresponding gate line, and transfers the trigger signal to a next-stage unit circuit to carry out the gate driving function. Such design can omit the need to individually set a gate driving chip in the frame region of the display panel, thus it facilitates achieving narrow-frame design of the display panel, simultaneously reduces the product cost of a relevant product, and enhances market competitiveness of the display product.
Generally, the circuit structure of an existing shift register is shown in FIG. 1, and its corresponding input and output time sequential diagram is shown in FIG. 2. As can be seen from FIG. 2, when the shift register normally is turned on to operate, the electric potential of a first node PU of the shift register is pulled up during a first time period and continues to be pulled up during a second time period, thereby controlling a switch transistor T7 to switch on, such that a scanning signal output terminal correspondingly outputs a scanning signal. However, since the voltage signal outputted by the first node PU has noise (as shown in Region A marked in FIG. 2), and the electric potential of the signal generated by the first node PU when it is pulled up for the first time is relatively high, the charging and discharging process of a capacitor C1 easily causes the scanning signal outputted by the scanning signal output terminal to have great noise (as shown in Region B marked in FIG. 2), further resulting in large power consumption of the shift register circuit and decreasing the yield of the display panel.
Therefore, those skilled in the art desiderate to solve the technical problem of how to reduce noise of the scanning signal outputted by the shift register to reduce power consumption, thereby increasing the yield of the display panel.